ACM Bangalore

The panel will cover:
• Parallel Programming and its need today more than ever, Coupled with approaches to exploiting multicore hardwares. • Different levels of parallelism • Emergence of Issues in extracting parallelism from legacy (static, dynamic analysis for the same) • Fresh abstractions to parallel programming (e.g. CUDA, Functional Programming), • Support from chip providers etc. for making job of programmers easy for exploiting multi core to name a few • Opportunities from business perspective of emergent high performance parallel computing paradigms

Venue: Room 133,IIIT Bangalore, Electronic City
Refreshments served
Time: 4 pm to 6 pm, 27th May 2009.

Speakers
Ananth Grama, Professor of Computer Science, University of Purdue

Professor Grama's research interests span the areas of parallel and distributed computing architectures, algorithms, and applications. His work on distributed infrastructure deals with development of software support for dynamic clustered and multiclustered environments. More recent work has focused on resource location and allocation mechanisms in peer-to-peer networks. His research on applications has focused on particle dynamics methods, their applications to dense linear system solvers, and fast algorithms for data compression and analysis.

Professor Grama has authored several papers and co-authored a text book Introduction to Parallel Computing: Design and Analysis of Algorithms with Vipin Kumar, Anshul Gupta, and George Karypis. He is a member of American Association for Advancement of Sciences and Sigma Xi. He has a PhD in computer science from University of Minnesota.

Suresh Jagannathan, Professor of Computer Science, Purdue University Professor Jagannathan is interested in the semantics and implementation of high-level programming languages. His work focuses on formal methods for describing and implementing such languages, e.g., type theory, program analysis, abstract interpretation, etc., as well as compiler and runtime techniques that leverage such analyses. He also has an active interest in the specification and implementation of concurrent and distributed systems. One aspect of this research studies the semantics and implementation of lightweight transactional abstractions as an alternative to lock-based synchronization for expressing scalable concurrent applications.

His current research also explores new software engineering techniques to infer salient behavioral properties of programs, using a combination of both static and dynamic mining strategies. The applicability of this work lies in improved error detection, test case generation, code quality and maintenance, and security. He has a PhD in Electrical Engineering and Computer Science from Massachusetts Institute of Technology.

Dr Sudeep Mullick, SETLabs

Dr. Sudeep Mallick is a Principal Research Scientist with the Distributed Computing Lab at SETLabs, Infosys. His research interests include Web Services, Service Oriented Architecture, Software Engineering, Enterprise Architecture and Parallel Computing. He has authored several papers in international conferences (ACM, IEEE and others), industry journals in SOA and software engineering and a book titled Enterprise IT Architecture. He has also been responsible for architecting solutions for Infosys’ Fortune 500 clients in banking and hi-tech manufacturing domains. Currently he is involved in software engineering aspects of on boarding legacy HPC applications onto various parallel computing platforms such as Grid and GPUs and is instrumental in designing industry vertical HPC solutions using GPGPU.

Ganesan Ramalingam, Microsoft Research

G. Ramalingam is a researcher at Microsoft Research India. He is interested in program analysis and its applications in areas such as program verification, program understanding, and program transformation. Some of his recent work and interests include concurrent shape analysis, mining temporal specifications, synthesizing concurrency control from proofs, and safe programmable speculative parallelism.